← SC-39
SC-39(2) SC · System and Communications Protection

Separate Execution Domain Per Thread

LOW MODERATE HIGH
1 Overlay 0 Related Controls
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Requirements NIST SOURCE

Maintain a separate execution domain for each thread in [multi-threaded processing].

Discussion (NIST Supplemental Guidance)

None.

Implementation Guidance

Engineering Interpretation

Original engineering commentary written for this explorer — not NIST source text and not authoritative guidance.

No engineering interpretation has been authored for SC-39(2) yet. This section is architected to receive it — see the Requirements and Assessment sections above for the authoritative NIST source content in the meantime.

Assessment

NIST SP 800-53A REV 5.2.0

Assessment Objectives

  1. multi-thread processing for which a separate execution domain is to be maintained for each thread is defined;
  2. a separate execution domain is maintained for each thread in <SC-39(02)_ODP multi-threaded processing>.

Examine

[SELECT FROM: System and communications protection policy; system design documentation; system configuration settings and associated documentation; system architecture; list of system execution domains for each thread in multi-threaded processing; system documentation for multi-threaded processing; system documentation from vendors, manufacturers, or developers; independent verification and validation documentation; system security plan; other relevant documents or records].

Interview

[SELECT FROM: System/network administrators; organizational personnel with information security responsibilities; system developer; organizational personnel installing, configuring, and/or maintaining the system; system developers/integrators].

Test

[SELECT FROM: System capability implementing a separate execution domain for each thread in multi-threaded processing].

Overlays

Showing the OT/ICS overlay for the parent control SC-39 — see the SC-39(2) entries within each baseline below.

OT/ICS Overlay SP 800-82r3

NIST SP 800-82r3 Appendix F, Table 22. Blank baseline means the control/control enhancement is not selected in that initial OT baseline.

LOW

  • Base control: Included (matches standard baseline)

MODERATE

  • Base control: Included (matches standard baseline)

HIGH

  • Base control: Included (matches standard baseline)

STIGs & CCIs

No STIG checks or CCI mappings are currently loaded for SC-39(2). This section is architected to display, per product: STIG ID, Finding ID, Severity, Title, Description, Check, Fix, CCI, and NIST control mapping — but nothing is populated here until a real DISA STIG/CCI dataset is ingested.

Learn more about STIG/CCI integration →

Evidence

Potential Evidence — Derived

Categorized from the SP 800-53A "Examine"/"Test" artifact list above by keyword — not an authoritative NIST evidence list.

Policy

  • System and communications protection policy
  • system security plan

Configuration

  • system design documentation
  • system configuration settings and associated documentation
  • system architecture

Testing

  • System capability implementing a separate execution domain for each thread in multi-threaded processing

Other Records

  • list of system execution domains for each thread in multi-threaded processing
  • system documentation for multi-threaded processing
  • system documentation from vendors, manufacturers, or developers
  • independent verification and validation documentation
  • other relevant documents or records